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Open Access Call for Semiconductor Innovations

Published on | 2 weeks ago

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Digital, Industry & Space Semiconductors

The first APECS Pilot Line Open Access Call, starting on 1 April, invites companies, small and medium-sized enterprises (SMEs), startups, research and technology organisations (RTOs), and universities to submit project ideas for selected pilot line technologies. This initiative seeks to enable access to advanced infrastructure for semiconductor research and development. Participants can test and validate their semiconductor innovations using various available technologies, including:

  • Characterization, Test & Reliability (CTR)
  • Multi Project Wafer (MPW) runs
  • Integration & Packaging Technologies
  • Imaging Technologies, Post-CMOS Photonic Platform & IPD planar components.

For more information, visit the APECS website.

Background:

APECS is the Pilot Line for Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems. Co-funded by Horizon Europe, Digital Europe and Member State authorities, it brings together the technological competences, infrastructure, and know-how of ten partners from eight European countries: Germany (Fraunhofer-Gesellschaft as coordinator, FBH, IHP), France (CEA-Leti), Belgium (imec), Finland (VTT), Austria (TU Graz), Greece (FORTH), Spain (IMB-CNM, CSIC) and Portugal (INL).

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ERC grants for UGent professor Lieven Eeckhout

Professor Lieven Eeckhout’s main research interests include computer architecture and the hardware/software interface with a specific emphasis on performance evaluation and modeling, and dynamic resource management.

Professor Eeckhout is the recipient of a European Research Council (ERC) Starting grant, Advanced grant and three Proof of Concept grants. Two of his former PhD students founded in 2013 CoScale, a spin-off in data center monitoring, which was acquired by New Relic.