The EU Chips Act highlights that the European digital autonomy can only be achieved through significant investment in microprocessor R&D, testing and experimentation facilities and ultimately production capacity. The emergence and momentum of RISC-V combined with open-source software provides a unique opportunity for a European HPC software and hardware ecosystem based on a truly independent source of technology. 

The EuroHPC Joint Undertaking is the legal and financial instrument to implement the Union’s strategy in high performance computing. The results of the RISC-V activities supported by the EuroHPC JU are expected to critically contribute to the European RISC-V ecosystem, not only to HPC but also to other key sectors using high-end components such as cloud, servers, AI, etc.

In view of the above, a Call in RISC-V for HPC under the EuroHPC JU (eurohpc-ju.europa.eu) has been adopted by the Governing Board of the EuroHPC JU and will be published shortly. The aim of the Call is to support a Framework Partnership Agreement (FPA) establishing a stable and structured long term partnership between the EuroHPC JU and a consortium of industry, research organisations and any other institution active in HPC. Consortium partners should commit themselves to establishing, coordinating and implementing a strategic and ambitious R&I initiative contributing to the development of innovative HPC hardware and software technology based on the open RISC-V ecosystem. This should be followed by an ambitious action for building and deploying the exascale and post-exascale supercomputers based on this technology. 

In this context the European Commission intents to organise a (hybrid) workshop on 11 January 2023 in Brussels. Please note that attendance to this meeting is by invitation from the Commission only, so those entities interested and willing to actively contribute to this European RISC-V initiative in HPC should signal to their interest to attend by by sending an email to CNECT-C2@ec.europa.eu not later than 4th January 2023.

Please note that the number of places in the room is limited.

Preliminary Agenda 

9:00 – 9:30 Registration & get together

9:30 – 10:00 Welcome & Introduction – CNECT (EC)

• Objectives of the meeting
• HPC Open-Risc-V vision
• Scope & objective of the call for proposal

10:00 – 12:30 Actions to be implemented – interactive session with pitches

• HW stack
• SW stack
• Key Applications

12:30 – 14:00 Lunch

14:00 – 16:00 Actions to be implemented – interactive session with pitches (continued)

• Fabrication
• Integration / pilot demonstrator
• Coordination & Project Management

16:00 – 16:30 Conclusions & Next steps